- A Logic Circuit Simulation Library in C++

Latest News...

3rd November 2006

libLCS-0.0.34 has been released. You can download it either by going through the download page, or directly from the libLCS project page on sourceforge.net. With this release the propogation delays, which can be set for the various modules, are inertial. A minor (unreported) bug has been fixed and the Bus concatenation operator has been changed. Find the detailed changelog here.

The next release of libLCS, if no bugs are reported or found with libLCS-0.0.34, will incorporate a feature similar to the assign keyword in Verilog. I also hope to provide Perl based test suites to test the libLCS static library. (Note however that this is not a priority if the new feature is ready over a small set of examples. The test suites will be provided with a later release).

The links to websites and documentation for older versions of libLCS can be found on the archives page.

What is libLCS

libLCS is a library for Logic Circuit Simulation developed in 100% c++. The ultimate aim of LCS is to become a thorough hardware description library, matching the functionality of the Verilog hardware description language, while keeping the usage (and syntax) as intuitive as possible. Currently, it supports building digital systems using logic gates, flipflops, clock, user defined modules, and facilitates propogation delays.

As libLCS is still in very early stages of development, it might contain bugs. Moreover, the API can get redone a lot of times before a beta version is released. However, you are encouraged to use it and report bugs and issues, if any, and help in making LCS popular ;-) and reliable. Use the above links to download, install, and start using the library. For bug reporting and feature/support requests, use the appropriate links provided on the libLCS project page on sourceforge.net. For problems with using the library, post your questions on the open forum, link to which is again available on the project page.

Like the library itself, this website is also under constant development. Hence, bear with any incovenience or lack of information. Do feel free to write in your comments to my yahoo.com id sivachandra_br. If you find the library usefull/worthwhile, then do let me know as to how it is being usefull to you. I am always keen to know as to who is using the library.


Copyright © 2006, 2007 Siva Chandra