|
- A Logic Circuit Simulation Library in C++ |
| Module(void) | lcs::Module | [inline] |
| onNegEdge(int portId) | lcs::Module | [inline, virtual] |
| onPosEdge(int portId) | lcs::Module | [inline, virtual] |
| onStateChange(int portId) | lcs::Module | [inline, virtual] |
| ~Module() | lcs::Module | [inline, virtual] |