- A Logic Circuit Simulation Library in C++

libLCS Userguide

---

An all new userguide is now available here. Continue reading below for the old userguide. Documentation of new features in libLCS will be added to the new userguide and not to the old one below.

This section is under heavy construction. Right now, the following sections and a set of topic guides are available. Use the links below to access them. See also the examples of using libLCS for more information.

A new userguide is being developed using the GNU Texinfo software. You can find it here. Though it is does not contain much information as yet, it will slowly be developed into a better and more organised replacement for the information provided on this page. If you are new to libLCS, then you might infact find this new userguide to be a better starting point. Be warned however that there is no link back to the main website from the new userguide. It would probably be a good idea to open it in a new window or a new tab.

---

1. Getting Started
2. The system time, and the class Clock
3. Building Custom Modules
4. Incorporating delays into functional modules
5. A Note on Connecting Modules
6. Continuous Assignments

---

Topic Guides

• Setting the line states of a bus
• Reading bus line states
• Displaying bus line states
• Bit operations on bus lines
• The functions lcs::InputBus::notify and lcs::InputBus::stopNotification
• Checklist for implementing functional modules
• Dumping simulation results into a VCD file

---

Copyright © 2006, 2007 Siva Chandra