- A Logic Circuit Simulation Library in C++
Line states of only
lcs::Bus objects can be set.
lcs::InputBus objects are readonly busses. Line states of
lcs::Bus objects can be set either bitwise, or as whole through the assignment operator
lcs::Bus::operator=. Bus lines states can also be initialised to a desired state at the time of bus declaration. Examples of all the three possibilities are shown below.
lcs::Bus<5> b1; // Declaration of a 5-line bus b1. Its line states are initialised to lcs::UNKNOWN. lcs::Bus<3> b2(5); // Declaration of a 3-line bus b2. Its line states are initialised to the binary // equivalent of the integer 5, which is 101. Note that libLCS is a little-endian // is a little endian system. b1 = lcs::HIGH; b1 = lcs::LOW; // Bitwise initialisation of bus lines. b1 = 25; // All the line states are initialised in one go to the binary bit equivalent of the integer 25 // in the little-endian format.