- A Logic Circuit Simulation Library in C++

lcs::JKFlipFlop< type, delay > Class Template Reference

#include <jkflipflop.h>

Inheritance diagram for lcs::JKFlipFlop< type, delay >:

List of all members.

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Detailed Description

template<PulseEdge type = POS_EDGE, unsigned int delay = 0>
class lcs::JKFlipFlop< type, delay >

This is class template which encapsulates a JK flipflop.The template parameter should either be lcs::POS_EDGE or lcs::NEG_EDGE. lcs::POS_EDGE (which is the default) indicates a positive edge triggered flipflop, where as lcs::NEG_EDGE indicates a negetive edge triggered flipflop.

Public Member Functions
	JKFlipFlop (const Bus< 1 > &QBus, const InputBus< 1 > &JBus, const InputBus< 1 > &KBus, const InputBus< 1 > &clock, const InputBus< 1 > &reset)
virtual	~JKFlipFlop (void)
virtual void	onPosEdge (int portId)
virtual void	onNegEdge (int portId)
virtual void	onStateChange (int portId)
Static Public Attributes
static const int	J = 0
static const int	K = 1
static const int	CLK = 3
static const int	Q = 2
static const int	RST = 4

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Constructor & Destructor Documentation

template<PulseEdge type, unsigned int delay>

lcs::JKFlipFlop< type, delay >::JKFlipFlop	(	const Bus< 1 > &	QBus,
		const InputBus< 1 > &	JBus,
		const InputBus< 1 > &	KBus,
		const InputBus< 1 > &	clock,
		const InputBus< 1 > &	reset
	)

The only explicit constructor.The other constructors, if synthesized by the compiler, are practically useless and hence their use should be avoided.

Parameters:

	QBus	The single line output bus of the flipflip.
	JBus	The single line J input bus of the flipflop.
	KBus	The single line K input bus of the flipflop.
	clock	The clock input to the flipflop.
	reset	The reset input to the flipflop. If the reset input is lcs::HIGH, then the Q output will be lcs::LOW not matter what the J, K and the clock inputs are.

template<PulseEdge type, unsigned int delay>

lcs::JKFlipFlop< type, delay >::~JKFlipFlop

(

void

)

[virtual]

Destructor.

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Member Function Documentation

template<PulseEdge type = POS_EDGE, unsigned int delay = 0>

virtual void lcs::JKFlipFlop< type, delay >::onNegEdge

(

int

portId

)

[inline, virtual]

The function which is triggered by the clock input in case of a negetive edge triggered flipflop. User of the class lcs::JKFlipFlop will never need to call this function under normal circumstances.

Reimplemented from lcs::Module.

template<PulseEdge type = POS_EDGE, unsigned int delay = 0>

virtual void lcs::JKFlipFlop< type, delay >::onPosEdge

(

int

portId

)

[inline, virtual]

The function which is triggered by the clock input in case of a positive edge triggered flipflop. User of the class lcs::JKFlipFlop will never need to call this function under normal circumstances.

Reimplemented from lcs::Module.

template<PulseEdge type, unsigned int delay>

void lcs::JKFlipFlop< type, delay >::onStateChange

(

int

portId

)

[virtual]

This function handles the reset button.

Reimplemented from lcs::Module.

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Member Data Documentation

template<PulseEdge type = POS_EDGE, unsigned int delay = 0>

const int lcs::JKFlipFlop< type, delay >::CLK = 3 [static]

A static integer id which denotes the port corresponding to the clock input.

template<PulseEdge type = POS_EDGE, unsigned int delay = 0>

const int lcs::JKFlipFlop< type, delay >::J = 0 [static]

A static integer id which denotes the port corresponding to the J input.

template<PulseEdge type = POS_EDGE, unsigned int delay = 0>

const int lcs::JKFlipFlop< type, delay >::K = 1 [static]

A static integer id which denotes the port corresponding to the K input.

template<PulseEdge type = POS_EDGE, unsigned int delay = 0>

const int lcs::JKFlipFlop< type, delay >::Q = 2 [static]

A static integer id which denotes the port corresponding to the output of the flipflop.

template<PulseEdge type = POS_EDGE, unsigned int delay = 0>

const int lcs::JKFlipFlop< type, delay >::RST = 4 [static]

A static integer id which denotes the port corresponding to the reset input.

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Copyright © 2006, 2007 Siva Chandra